Product Summary
The AD9750ARUZRL7 is a 10-bit resolution, wideband, second generation member of the TxDAC series of high performance, low power CMOS digital-to-analog-converter (DAC). The TxDACfamily, which consists of pin compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package and pinout, thus providing an upward or downward component selection path based on performance, resolution and cost. The AD9750ARUZRL7 offers exceptional ac and dc performance while supporting update rates up to 125 MSPS. The AD9750ARUZRL7 flexible single-supply operating range of 4.5 V to 5.5 V and low power dissipation are well suited for portable and low power applications. Its power dissipation can be further reduced to a mere 65 mW, without a significant degradation in performance, by lowering the full-scale current output. Also, a power-down mode reduces the standby power dissipation to apprixmatley 20 mW. The AD9750ARUZRL7 is manufactured on an advanced CMOS process. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution. The digital inputs support +2.7 V and +5 V CMOS logic families. The AD9750ARUZRL7 is a current-output DAC with a nominal full-scale output current of 20 mA and > 100 kΩ output impedance. The AD9750ARUZRL7 is available in 28-lead SOIC and TSSOP packages. It is specified for operation over the industrial temperature range. The AD9750ARUZRL7 can be applied in wideband communication transmit channel, digital radio link, direct digital synthesis (dds), and instrumentation.
Parametrics
AD9750ARUZRL7 absolute maximum ratings: (1)AVDD ACOM: –0.3 +6.5 V; (2)DVDD DCOM: –0.3 +6.5 V; (3)ACOM DCOM: –0.3 +0.3 V; (4)AVDD DVDD: –6.5 +6.5 V; (5)CLOCK, SLEEP DCOM: –0.3 DVDD + 0.3 V; (6)Digital Inputs DCOM: –0.3 DVDD + 0.3 V; (7)IOUTA, IOUTB ACOM: –1.0 AVDD + 0.3 V; (8)COMP1, COMP2 ACOM: –0.3 AVDD + 0.3 V; (9)REFIO, FSADJ ACOM: –0.3 AVDD + 0.3 V; (10)REFLO ACOM: –0.3 +0.3 V; (11)Junction Temperature: +150°C; (12)Storage Temperature: –65 +150°C; (13)Lead Temperature (10 sec): +300°C.
Features
AD9750ARUZRL7 features: (1)High Performance Member of Pin-Compatible; (2)TxDAC Product Family; (3)125 MSPS Update Rate; (4)10-Bit Resolution; (5)Excellent Spurious Free Dynamic Range Performance; (6)SFDR to Nyquist @ 5 MHz Output: 76 dBc; (7)Differential Current Outputs: 2 mA to 20 mA; (8)Power Dissipation: 190 mW @ 5 V; (9)Power-Down Mode: 20 mW @ 5 V; (10)On-Chip 1.20 V Reference; (11)CMOS-Compatible +2.7 V to +5.5 V Digital Interface; (12)Packages: 28-Lead SOIC and TSSOP; (13)Edge-Triggered Latches.
Diagrams
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