TMS320LF2406APZA

Product Summary

The TMS320LF2406APZA is a digital signal processor (DSP) controller. It offers an array of memory sizes and different peripherals tailored to meet the specific price/performance points required by various applications. Flash devices of up to 32K words offer a cost-effective reprogrammable solution for volume production. The TMS320LF2406APZA includes ROM devices that are fully pin-to-pin compatible with their Flash counterparts. The TMS320LF2406APZA also offers at least one event manager module which has been optimized for digital motor control and power conversion applications.

Parametrics

TMS320LF2406APZA absolute maximum ratings: (1)Supply voltage range:-0.3 V to 4.6 V; (2)VCCP range:-0.3 V to 5.5 V; (3)Input voltage range:-0.3 V to 4.6 V; (4)Output voltage range:-0.3 V to 4.6 V; (5)Input clamp current:± 20 mA; (6)Output clamp current:± 20 mA; (7)Operating free-air temperature ranges: A version:-40℃ to 85℃, S version:-40℃ to 125℃; (8)Junction temperature range:-40℃ to 150℃; (9)Storage temperature range:-65℃ to 150℃.

Features

TMS320LF2406APZA features: (1)Programmable Deadband (Deadtime) Prevents Shoot-Through Faults; (2)Three Capture Units for Time-Stamping of External Events; (3)Input Qualifier for Select Pins; (4)On-Chip Position Encoder Interface Circuitry; (5)Synchronized A-to-D Conversion; (6)Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control; (7)Applicable for Multiple Motor and/or Converter Control; (8)Phase-Locked-Loop (PLL)-Based Clock Generation; (9)Up to 40 Individually Programmable, Multiplexed General-Purpose Input /Output(GPIO) Pins; (10)Up to Five External Interrupts (Power Drive Protection, Reset, Two Maskable Interrupts); (11)Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and Code Composer Studio Debugger; (12)Evaluation Modules; (13)Scan-Based Self-Emulation; (14)Broad Third-Party Digital Motor Control Support; (15)8 or 16 Multiplexed Input Channels; (16)500-ns MIN Conversion Time; (17)Selectable Twin 8-State Sequencers Triggered by Two Event Managers.

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