Product Summary

The Z16C3220VSC is an integrated universal serial controller. The Z16C3220VSC is a multiprotocol datacommunications device with onchip dual-channel DMA. The integration of a high-speed serial communications channel with high-performance DMA facilitates higher data throughput than can be achieved with discrete serial/DMA chip combinations. There are additional reasons for using the Z16C3220VSC IUSC than just reduced chip count and board space economy. The DMA and serial channel intercommunication offers application benefits as well. For example, events such as the reception of the end of a HDLC frame is internally communicated from the serial controller to the DMA so that each frame can be written into a separate memory buffer.

Parametrics

Z16C3220VSC absolute maximum ratings: (1)Supply Voltage, VCC: -0.3 to +7.0 V; (2)Storage Temp, TSTG: -65℃ to +150℃; (3)Power Dissipation: 2.2 W.

Features

Z16C3220VSC features: (1)Two Full-Capacity 20 MHz DMA Channels, Each with 32-Bit Addressing and 16-Bit Data Transfers; (2)DMA Modes Include Single Buffer, Pipelined, Array-Chained and Linked-Array Chained; (3)Ring Buffer Feature Supports Circular Queue of Buffers in Memory; (4)Linked Frame Status Transfer Feature Writes Status Information for Received Frames and Reads Control Information for Transmit Frames to the DMA Channel’s Array or Linked List to Significantly Simplify Processing Frame Status and Control Information; (5)Programmable Throttling of DMA Bus Occupancy in Burst Mode with Bus Occupancy Time Limitation; (6)0 to 20 Mbit/sec, Full-Duplex Channel, with Two Baud Rate Generators and a Digital Phase-Locked Loop for Clock Recovery; (7)32-Byte Data FIFOs for Receiver and Transmitter; (8)Up to 12.5 MByte/sec (16-Bit) Data Bus Bandwidth; (9)Multiprotocol Operation Under Program Control with Independent Mode Selection for Receiver and Transmitter; (10)Async Mode with One-to-Eight Bits/Character, 1/16 to Two Stop Bits/Character in 1/16 Bit Increments; 16x, 32x, or 64x Oversampling; Break Detect and Generation; Odd, Even, Mark, Space or No Parity and Framing Error Detection. Supports 9-Bit and MIL-STD-1553B Protocols; (11)HDLC/SDLC Mode with 8-Bit Address Compare; Extended Address Field Option; 16- or 32-Bit CRC; Programmable Idle Line Condition; Optional Preamble Transmission and Loop Mode. Selectable Number of Flags Between Back-to-Back Frames; (12)Byte Oriented Synchronous Mode with One-to-Eight Bits/Character; Programmable Sync and Idle Line Conditions; Optional Receive Sync Stripping; Optional Preamble Transmission; 16- or 32-Bit CRC; Transmitto-Receive Slaving (for X.21); (13)External Character Sync Mode for Receive; (14)Transparent Bisync Mode with EBCDIC or ASCII Character Code; Automatic CRC Handling; Programmable Idle Line Condition; Optional Preamble Transmission; Automatic Recognition of DLE, SYN, SOH, ITX, ETX, ETB, EOT, ENQ and ITB; (15)Flexible Bus Interface for Direct Connection to Most Microprocessors; User Programmable for 8 or 16 Bits Wide. Directly Supports 680X0 Family or 8X86 Family Bus Interfaces; (16)Receive and Transmit Time Slot Assigners for ISDN, T1 and E1 (CEPT) Applications.; (17)8-Bit General-Purpose Port with Transition Detection; (18)Low Power CMOS; (19)68-Pin PLCC Package; (20)Electronic Programmer’s Manual Support Tool and Software Drivers are Available.

Diagrams

Z16C3220VSC block diagram

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